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Altera_Forum's avatar
Altera_Forum
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7 years ago

PCIE to DDR4

I have follow PCIE DMA Access to External Memory reference design, I program sof file to FPGA, and reboot. I can see device through PCIE by "lspci | grep Altera", however, every time I try ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

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I want to know if parameters in EMIF was wrong, will cause computer crash?

or just get wrong data when transport to DDR? or lower bandwidth?

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I hope, By this time you might have fixed it. if yes, can you mention what went wrong ??

Its happened previously with ourselves as well. what i did was, instead of doing "start DMA" first time, i will disable one option either read dma or write dma and then i will select start dma then it works fine and displays data transfer time. Later , the code was entirely modified and able to send our algo data into ddr3.