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I tried but it wan't work.
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Tried what exactly? 5 instances of a x1 PCIe core? How many hard-IP PCIe cores does your device have?
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I am using Startix IV for this implementation.
I am using 4 ALTGX working at PCIe protocol.
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Which device? Does it have 4 PCIe hard-IPs?
Why do you want to implement a PCIe switch in an FPGA, when PLX and IDT sell these types of devices at a fraction of the cost of an FPGA?
You might want to re-think your architecture, and just use the FPGA where you need customization.
Cheers,
Dave
Honored Contributor
