PCB Design using Cyclone III (EP3C120) concerns

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In a few words, i just want some guidelines and critical components needed to build a minimum system for an FPGA. Is it good just to start with some power sources, the FPGA, appropiate bypass capacitors, a JTAG header, and watch for trace impedance matching?

I hope I'm not asking too much, as you may know this is my first project using these type of devices... Maybe I'm just freaking out.

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The first thing I place when doing an FPGA PCB design is the config prom and the JTAG header and get these as close

to the device as possible (within the limitations of the design).

If you keep these interfaces short you won't have to worry about track impedances/ reflections etc.

Nial.

That seems reasonable to me, but what would you recommend me for the power supply section? Some DC/DC Converters that you have used already? I understand that ripple must be minimized and the power-up sequence it's important, also that EP2C120 requires 1.2V for internal power and its PLL and finally 1.8V and 2.5V for its I/O banks.

Thanks a lot for your help

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That seems reasonable to me, but what would you recommend me for the power supply section? Some DC/DC Converters that you have used already? I understand that ripple must be minimized and the power-up sequence it's important, also that EP2C120 requires 1.2V for internal power and its PLL and finally 1.8V and 2.5V for its I/O banks.

Thanks a lot for your help

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Have a look at the power analysis tool, if you plug in rough values for your design it'll tell you how much current each power rail requires.

I usually use a switcher for VccInt then linear regulators or switchers depending on the board VccIO requirement.

The power up sequence isn't important as far as I know (as long as the supplies come up fairly qickly).

You'll end up having to read a lot of the documentation I'm afraid!

Nial.

Some older Altera FPGAs were picky about sequence but Cyclone III does not require any specific power up sequence.

Requirements are just that it's monotonic.

Cyclone III needs 1.2V for core, 1.2V and 2.5 for PLLs and then 1.2/1.8/2.5/3.0/3.3V for the I/O banks, depending on your configuration.

Any decent switched converter will do, provided it can work with the spec (ie, 1.15 -- 1.25 for VCCINT).

Power supply and signal integrity issues depend on the frequencies you'll be operating at and also the I/O standards you're using. LVCMOSL I/Os generate much powerfull noise than LVDS.

General rules apply.

- Use decoupling capacitors and inductors, as much as possible, to filter the power supply lines. Try to use Altera's PDN tool to size them up.

- If you're using non-terminated I/Os (ie, LVCMOS) try to keep the traces as short as possible. These I/O standardads don't use matching impedances and reflections are unavoidable.

- If you're using terminated I/Os (ie, LVDS) then you can have long traces with good signal integrity, provided you match the line impedance.

- In any case, make sure any fast swtiching signal line has a good ground/power plane. Or, if you really really have have to cross a plane discontinuity, put stitching capacitors.

Note that JTAG and PROM interface VCCIO as every other pin in bank 1.

With Cyclone III, you should add external clamping diodes on the JTAG pins, if you're using 2.5V or higher.

The schematics of development boards, (ie, DE-0) are online, and you can use them as starting point.

As soon as possible in your PCB design, and definitely before you sign it off for production, you should at least make a mock up project, do the pin assignment and compile it.

Then cross check your PCB design with the .pin report file produced by Quartus and the Cyclone III pin connection guidelines.