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I've been wanting to try what you said but haven't been able to. It seems like a useful feature to have. I've spoken to altera regarding partial reconfigure and they have problems themselves when using it. I believe there is something wrong on the dye thats causing the issue u mentioned. The latest sv boards have the fix for it. Sorry I couldn't help with your problem. :(
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The partial reconfiguration require a license that you must pay extra money for. I can't believe that Altera announce its partial reconfiguration support when there is a such obvious bug, although not many people use it in product environment.
Actually, the problem is really easy to replay. I now confirm that the problem has some relationship with the block RAM usage. When you use a FIFO, and/or a shift-RAM in the reconfigured region, you have 99% probability to get that problem. If you don't use any RAM in the reconfigured region, no matter how many percentage resource you are using, there is no CRC error reported.
Dose the "The latest sv boards" you mentioned mean the latest batch of SV chips? So if I buy a new FPGA card with the latest chip, it will solve my problem, right?
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