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Altera_Forum's avatar
Altera_Forum
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10 years ago

Partial reconfiguration CRC error

I am using Stratix V FPGA, and using the partial reconfiguration feature while I got the CRC error when I do the partial reconfiguration. FPGA is connected with CPU through PCIe interface. My s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Thanks for your help. I heard about CVP but not use it before. Beside the PCIe IP core, there are static logic inside the FPGA, and two reconfigurable regions ( or you call them partitions). Each such region has multiple personas and I want them to be configured at the run-time. When one region is being reconfigured, the other region can be still running normally.