parallel lvds outputs

Yikes! 760pF is huge.

Quartus will take that capacitance into account for timing analysis if you set it in the board trace model parameters.

A quick experiment says that 760 pF is adding 33 ns of delay for a Cyclone III.

I think you should be able to use multiple outputs to increase the drive capacity.

You should set timing constraints on those outputs and set their load capacitance.

If you're using N outputs to drive a single input, then set the load capacitance as 760p/N for each output.