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Altera_Forum's avatar
Altera_Forum
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14 years ago

O/S handling PCIe reconfiguration (i.e., hot-swap)

I'm going to use the PCIe interface in a new design, most likely in a CompactPCI Serial form-factor (this is the PCI Express update to the CompactPCI form-factor).

I've designed 32-bit/64-bit parallel interface CompactPCI designs in the past. These boards support hot-swapping, i..e, the board can be plugged into a crate while the power is on. PCI devices are normally configured at power-on by the BIOS, however, a hot-swapped device needs to be configured by whatever OS is running on the crate system-slot CPU.

The system slot in the crate contains a main CPU running Linux, and although we figured out how to get hot-swap support to work, we could not find any details in the CPU documentation on what interrupt was connected to the PCI ENUM# pin (this is the pin that boards use to indicate they've been plugged in). In the end, we just ignored this feature, as it wasn't critical to operation.

In the new design, I am going to use a Stratix IV device. I need to reconfigure the FPGA during operation, which means the PCIe interface will 'disappear'. The Stratix V device wouldn't have this problem, as its PCIe interface can be left running while the core is reconfigured, however, the Stratix V devices are not an option at this time.

So what are people's experience with pcie hot-swapping under linux or windows?

If the OS support is still pretty weak, then I think I'll hide the FPGA behind a PCIe-to-local bus bridge. Then the board can power-on and configure as a PCIe end-point that will not dynamically disappear when I reconfigure the FPGA.

Cheers,

Dave

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Dave,

    I am facing a similar problem with keeping the PCIe alive or re-enumerating after the FPGA is reconfigured/programmed. I am using a SIV on a Linux host. Did you figure out how this is accomplished? Currently, we reboot after programming to force re-enumeration. We need to make it possible to reconfigure the FPGA without reboot. Thanks,

    Jay
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Hi Jay,

    --- Quote Start ---

    I am facing a similar problem with keeping the PCIe alive or re-enumerating after the FPGA is reconfigured/programmed. I am using a SIV on a Linux host. Did you figure out how this is accomplished? Currently, we reboot after programming to force re-enumeration. We need to make it possible to reconfigure the FPGA without reboot.

    --- Quote End ---

    The plan for my Stratix IV GX design is to hide it behind a Cyclone IV GX that implements the PCIe bridge. The Cyclone will take care of house-keeping chores, such as fast-passive-parallel (FPP) programming of the SIV. This makes the design more like a Stratix V with CvP (configuration via protocol).

    For my application, I cannot afford to reboot the host each time I change FPGA configuration.

    If you want to know how to force re-enumeration of the bus directly under Linux without having to reboot. Email me (my forum name) and I'll pass you onto my resident Linux Guru (Ira). He played with the hot-swap layer under Linux, and although we could not get the PCI ENUM# pin working (since it was not documented on the CPCI host CPU), he did get software re-enumeration working.

    Cheers,

    Dave