Honored Contributor
Honored ContributorHi Jay,
--- Quote Start --- I am facing a similar problem with keeping the PCIe alive or re-enumerating after the FPGA is reconfigured/programmed. I am using a SIV on a Linux host. Did you figure out how this is accomplished? Currently, we reboot after programming to force re-enumeration. We need to make it possible to reconfigure the FPGA without reboot. --- Quote End --- The plan for my Stratix IV GX design is to hide it behind a Cyclone IV GX that implements the PCIe bridge. The Cyclone will take care of house-keeping chores, such as fast-passive-parallel (FPP) programming of the SIV. This makes the design more like a Stratix V with CvP (configuration via protocol). For my application, I cannot afford to reboot the host each time I change FPGA configuration. If you want to know how to force re-enumeration of the bus directly under Linux without having to reboot. Email me (my forum name) and I'll pass you onto my resident Linux Guru (Ira). He played with the hot-swap layer under Linux, and although we could not get the PCI ENUM# pin working (since it was not documented on the CPCI host CPU), he did get software re-enumeration working. Cheers, Dave
