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Altera_Forum
Honored Contributor
Honored ContributorOpenCores MAC timing contraints
Hi, I try to make a design using the OpenCores Eth 10/100 but have a lot of Timing Requirements not met. Could someone who succeed in similar work share its timing constraints file (.sdc)? ...
Altera_ForumHonored Contributor
Honored ContributorI'm afraid. I don't have a sample.
I searched one of my designs where I used OC mac, but I found that I rather used a crude method to bypass the warning: I put set_false_path between mac rx/tx clocks and the system clocks. AFAIK I've never had timing problems. I'm confident this is not an issue, since rx/tx clock 25MHz frequency is quite low and the timing requirements are easily met.
