OpenCores CAN

Hello

This is quite interesting and I will be looking further into it. Do you know if it can be used in a commercial application ? What about royalties to Bosch ?

Regards

Nir

You should contact Bosch for anything regarding licensing. Something along the lines of signing an agreement to pay a per node fee. Refer to opencores.org CAN project for further info. http://www.opencores.org/projects.cgi/web/can (http://www.opencores.org/projects.cgi/web/can)

When I have a bit more time next week I'll finish the driver code for this.

The problem with any "Open" CAN core is the Bosch license.

I looked into using either the OpenCores CAN core or licensing IP from one of the

other providers however they all work out pretty much the same.

Bosch currently charge aprox 10000 Euros for a license (yep 10 thousand)

This is pretty prohibitive unless you are into really big productions runs.

Other IP implementations include the Bosch license in their release so you

still pay Bosch but indirectly, the cheapest I managed to get down to was

about 7000 Euros which was still too high for us.

In the end we had to resort to using a standard off the shelf CAN peripheral

chip in addition to the FPGA, a real shame but until the license comes down

it was the only way. You could of course just ignore the license but I'm sure

that would be pretty illegal http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/wink.gif

Regards,

This is exactly also our problem.

The 10000 Euro is the license cost to bosh, and the you can ship 100.000 systems. Additional systems can be made at an extra cost of about 0.10 Euro (so the same price).

I had an offer from Bosh, and with that 10000Euro, you get also the Bosh IP core. So is anybody using the opencore version?

Stefaan

Hi JoelW,

Have you had a chance to post the drivers for this core?

I tried also to use the opencore can recently and following issues appeared :

- the fifo&#39;s were not working, and because of some compiler warnings about the incompatibility of the memory, I got rid of them. You don&#39;t really need a receive fifo with a nios processor. A CAN message itself is around 100 to a few 100 microseconds, so if you can&#39;t read the message during this time, the whole system must be changed anyway.

Without the fifo&#39;s it saves you also a few 100 logic elements. (the core dropped from around 1400 to 1100 cells).

A receive fifo is impemented in our software and is filled from interrupt, this fifo existed also with using the SJA1000 chip, a fifo on a fifo should be a bit stupid.

- the most of the time for reading or sending a message to the can core is shifting data around for the CAN-ID&#39;s. They are placed in an unnatural way into the register space of the SJA1000 component (the &#39;prototype&#39; of the core). Restructering them gives less instructions in interrupt.

- why not using a 32 bit interface?? It is a 32bit processor and all the signals stay inside the chip anyway. For example with a 32 bit interface, checking how much &#39;bytes&#39; to send to the core will take longer than just dumping two DWORDs (8 bytes is the maximum) to the correct address.

-without the fifo&#39;s and a little bit more fiddling with the core, it&#39;s easy to get rid of the extra wait state in the bus interface also.

Interrupt time for sending and receiving dropped from around 10µs to around 3µs doing the things above.

Just some ideas,

Stefaan