onchip memory timing constraints

Have you tried generating 128bpw memory blocks with the Wizard, then paralleling them to achieve a wider port?

What do you mean with data "doesn't get saved properly": not saved at all? a few wrong bits? random saved data?

You should also consider the problem can be due to the memory interface. Where does data come from? How do you perform writes? It could also be timing related, but I dare say a "functional" timing issue.