Forum Discussion
Altera_Forum
Honored Contributor
16 years agoHi Jake,
I added a ddr-sdram, put 40kbytes of onchip mem and put the reset and irq vectors of the cpu on the ddr instead of the onchip mem. I still missed 5000 bytes. I tried 45000kbytes of onchip mem but it is too much and Quartus II did not compile. I chose to run the code on the DDR SDRAM for the program memory and let the rest of the right column to ssram memory. I also tried to put everything on ddr sdram memory. But then, I have : Build : Hardware simulation is not enabled for the target SOPC Builder system. Skipping creation of hardware simulation model contents and simulation symbol files Run as : Downloading 02000000 ( 0%) Downloaded 48KB in 0.8s (60.0KB/s) Verifying 02000000 ( 0%) Verify failed between address 0x2000000 and 0x200BFEB Leaving target processor paused What should I do ? Thanks in advance, Myriam