Forum Discussion
New ContributorOn-Chip Lookup Sensitivity Processing on Stratix10, Arria 10
Ok, it looks like the answer here is that you need FEATUREs in your license file in order to do the sensitivity processing. In the end I contacted the sales department, let them know what I wanted to do, and then they sent me a new license that had more FEATUREs in it.
Once you know this is the issue, you can actually see it in one of the user guides. There wasn't anything about it in the Advanced SEU Detecetion IP core guide, nothing in the Error Message Register Unloader IP core guide. However, there's a line in the Fault Injection IP core guide that says,
"The following hardware and software is required to use the Fault Injection Debugger:
- FEATURE line in your Intel FPGA license that enables the Fault Injection IP core. For more information, contact your local Intel FPGA sales representative.
- ...
- (Optional) FEATURE line in your Intel FPGA license that enables the Advanced SEU Detection IP core."
New ContributorBruce,
I have never been able to get this flow to work. By that, I mean that I've never been able to inject faults with the FID and recover from the error via the ASD reading the SMH file and interpreting the error. I have tried on 21.1 Pro, 20.1.1 Standard, 19.3 Pro, and 16.0 Standard with no luck. You say that you can se the option on Stratix 10 with 21.1 Pro, right? Could you send me your design?
Thank you!
New ContributorAre there any specific lines I need in my QSF file that I don't have? Is there some secondary tool I need to download?
I'm at a loss as to why it's working for you and not for me, so I'd like to replicate your setup as much as I can so that I can produce the same result.
