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I'm using the DE2 board with a NIOS II system. I have on-chip RAM and FIFO and a PS/2 controller attached. The FIFO is single clocked, input and output Avalon MM. I have to write the code for the NIOS II in assembly, as per class instructions. When I try to either read or write from the FIFO, the entire system freezes, and I have to restart both the Altera Monitor Program and the DE2 board. When I look at the memory location that the FIFO registers and in/out ports should occupy, I see question marks, instead of actual data. I built the system using SOPC builder. The in port occupies address 0x4000, the out port 0x4004, and the registers 0x4020 - 0x403f. The fifo clock is the same clock that the NIOS II runs on. Am I missing something programatically or is the system incorrectly build?
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- It sounds like the waitrequest output of the FIFO is getting set and not clearing causing the system to wait forever...just a first guess
- Is this a FIFO that you wrote or a proven working design?
- Did you run the design on a simulator? If not, you should. It shouldn't take long to create the failure condition since it is simply writing to a single address
Kevin Jennigns
Honored Contributor
