Altera_ForumHonored Contributor15 years agonSTATUS pin is low. All powers(core,I/O……) are well,but after power up,the nSTATUS is always low level,why?Is the FPGA chip damaged?
Altera_ForumHonored Contributor15 years agocheck this link http://www.alteraforum.com/forum/showthread.php?t=5854 Regards, shahul
Recent DiscussionsDK-DEV-AGI027-RA QSPI Verification FailsCyclone 5 SoC FPGA Bank Supply PrerequisiteAGILEX 5 Migration issueTo INTEL - Request for Compliance Data from Analog Devices, IncArria 10 GX RX max intra-differential pair skew