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Altera_Forum's avatar
Altera_Forum
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16 years ago

nStatus can't go high

I have just finished my pcb of EP3C25F324, but it can't work when I power on the board, all user IO pins stayed high, the nSTATUS remaid low, and nCONFIG statyed high. Is't the problem of POR? Or ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Since nSTATUS is stuck low it sounds like it could be a POR problem. Though I don't know of a POR problem with this specific device for Altera. But there are other reasons a device may not exit POR too, like voltage levels on supplies all must be above the POR trip points, control pins need to be tied or driven correctly, etc...

Debug techniques:

I would put a scope on nSTATUS and trigger on a rising edge, single sequence (Single event trigger, one time trigger). Try varying trigger point voltage levels. Around 0.2 to 0.8V and look for a rising pulse then nSTATUS should drive low when entering POR, but should also release nSTATUS back high again after POR.

Also list for us your voltage supplies and what they are powered to. Especially VCCIO of the banks that have configuration pins in them. I noticed the JTAG header is powered at 2.5V, the EPC is powered at 3.3V, what are the voltages of VCCIO for these banks?