hi,
the divider compnenrt is working well, the thing is that i am tring to put it under another compnenet, the other componenet is using the arith.all library.
all the files go throgh complition, but as i am trying to run the testbench on modelsim i get an error saying that "# ** Failure: (vsim-3807) Types do not match between component and entity for port "a".
" for all compnenet ports, i have checked both the packege file and the enttity file' where types are defined and they are all set corectlly. do you know i get this error and how can i overcome it?
thanks