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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

not able to detect any instance for core < hps_sdram_p0 >

Hi, I'm trying to get into a Cyclone V based evaluation board (EBV SoCrates). While already getting LEDs to blink, on pure FPGA side, now I wanted to do a setup with QSYS. I took the "default c...
PShar32's avatar
PShar32
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

hi,..

I was suffering the same .. and I followed the steps you provided.. and when I run TCL scrip I get error like.

Error:Error: The core < hps_sdram_p0 > is instantiated within another component (wrapper)
Error:Error: The core is not the top-level of the project
Error:Error: The memory interface pins are exported to the top-level of the project
Error:Error: Alternatively, if you are no longer instantiating core < hps_sdram_p0 >,
Error:Error: clean up any stale SDC_FILE references from the QSF/QIP files.
Error:Info: Dumping reference pin-map file: hps_sdram_p0_all_pins.txt
Error:Error (23031): Evaluation of Tcl script F:/<----->/synthesis/submodules/hps_sdram_p0_pin_assignments.tcl unsuccessful
Error:Error: Quartus Prime TimeQuest Timing Analyzer was unsuccessful. 8 errors, 3 warnings.

But when I delete the <hps_dram_p0.sdc> from /synthesis/submodules I see no error in main compiler..... !

but it shows some error when i use nios II fast core.. like

Error (210039): File F:/micro_pmu_structure_01/output_files/micro_pmu_daq_time_limited.sof contains one or more time-limited megafunctions that support the Intel FPGA IP Evaluation Mode feature that will not work after the hardware evaluation time expires. Refer to the Messages window for evaluation time details.