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Honored Contributor
Honored ContributorNIOSII using the FPGA-to-HPS SDRAM Bridge via Address Span Extender
Hello, I want to share my DDR3-RAM from HPS with my NIOS2 on the FPGA. In hps instantiation I configured an Avalon MM Bidirectional port with 64bit width (FPGA-HPS-SDRAM Bridge). Afterwards I u...
Altera_ForumHonored Contributor
Honored ContributorHi,
I had the same problem before, and got this answer from Altera: Due to a limitation in Qsys we cannot currently dynamically set the Address Span expander to be / not be visible as memory for the NIOS II. This issue is planning to be release in to ACDS 14.1. However, please note that this schedule is not commitment. As for now, our suggested workaround is to remove# characters from line 546 and line 551 of "altera_address_span_extender_hw.tcl" file located at "<install_dir>/ip/altera/merlin/altera_address_span_extender" as below. • set_interface_assignment windowed_slave embeddedsw.configuration.isMemoryDevice 1 • set_interface_assignment windowed_slave embeddedsw.configuration.affectsTransactionsOnMasters "expanded_master" But there is another way to solve the problem: Change the embeddedsw.configuration.isMemoryDevice to 1 for the extender, the only penalty is that you have to do THIS every rebuild of the qsys-system and the previous is fix one time... I hope this helps...
