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GD76's avatar
GD76
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

NIOS programming CPLD

An external MAX10 CPLD JTAG pins are connected to Cyclone V IO pins. The intent is for NIOS embedded software in Cyclone V to program the MAX10 CPLD and verify the CPLD checksum. I hear two methods l...
EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.