Forum Discussion
GD76
Occasional Contributor
4 years agoNIOS programming CPLD
An external MAX10 CPLD JTAG pins are connected to Cyclone V IO pins. The intent is for NIOS embedded software in Cyclone V to program the MAX10 CPLD and verify the CPLD checksum. I hear two methods l...
EBERLAZARE_I_Intel
Regular Contributor
4 years agoHi,
You can refer to below link:
https://www.intel.co.jp/content/dam/altera-www/global/ja_JP/pdfs/literature/an/an425.pdf