Forum Discussion

ericmtzr's avatar
ericmtzr
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Nios IP question SPI

I am trying to implement and use the intel generic quad spi controller II to communicate with a serial flash memory.

The user guide states that the clock connection has a maximum frequency of 40 MHz.

Is that correct and why is that?

The rest of my design is running at 64 MHz and that is the frequency I would like to run the SPI core.

If the maximum clock rate really is 40 MHz then I believe I will have to implement a clock crossing bridge.

Thanks for any info you can provide.

3 Replies

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    Yes correct. According to the user guide it is designed to work up till 40MHz only. Whereas for the reason why the maximum input clock is 40MHz, I will have to ask engineering team to look into deeply.

    Thank you.


    Regards,

    Kelly Jialin


  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi,

    As we do not receive any response from you on the previous reply that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

    Thank you.


    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.


    Regards,

    Kelly Jialin, GOH