NIOS implementation with Cyclone II EP2C5T144

The EP2C5T144 is just too small to do anything useful with NIOS. A NIOS II/e economy core might just logically fit, but there is only 14KB of block ram on that device. Too little to be useful. The Altera devkit for NIOS on CycloneII uses an EP2C35 device, which is much larger resource wise.

If you really want to just work with an embedded processor (and don't care about it being soft-configurable) one of the newer CycloneV based SOC boards is the way to go (like: http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=167&no=941) pretty hard to beat for $99. Bit cheaper if you can prove you are a student (.edu email).

For a pure-play FPGA (no embedded SOC) this is a pretty good choice as well: http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=167&no=921 ($150, or $99 for academic discount).

So it depends on what you want to do. Do you want to fiddle with soft processor systems and design, or just go with an embedded hard processor like in the SOC based devices.