Forum Discussion
Altera_Forum
Honored Contributor
10 years agoYou don't need the nios_setup.sip file to program the device. That file is a pointer to all the of the library files that you need to simulate your design. You do need the nios_setup.qip file that has a pointer to all of the files you need to map and fit your design. That file can always be regenerated the same way you generate the .sopcinfo file. Open up qsys ,read the .qsys file and generate HDL and you will find the .qip file. Make sure to use the Project --> add/remove files from project feature and add the .qip file in your design. This way the mapper/fitter knows where to look for the all IP files that make up your design project.
In terms of including the NIOS executable in flash memory so you dont need to be tethered to a host computer, perhaps checkout this design example: https://cloud.altera.com/devstore/platform/15.0.0/nios-ii-adc-lcd-controller-design-example-10m50-dev-kit/ Look at the document link and search for the section that is called: Merging the NIOS executable into the FPGA configuration file . That will show you how to get the SW executable merged with hardware image and if stored on flash removes the requirement for a connection to a host computer. Let me know if that helps.