Forum Discussion
Altera_Forum
Honored Contributor
12 years agoSo for my project in the following attachment, the EPCS64 memory is divided in a factory code and an application code,
when I would have modified the EPCS_boot_rom.hex to# define SOFTWARE_OFFSET 0x400000, with the remote update I could read the position of my FPGA config image with IORD(REMOTE_BASE, 0x4) that should be 0x400000 ? I hope I'm right