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Altera_Forum
Honored Contributor
Honored ContributorNewb question- If statements
Im new to programming in VHDL and I seem to be having some difficulty with a particular set of if statements. I understand how conditional statements work, but for whatever reason Im not getting the ...
Altera_ForumHonored Contributor
Honored ContributorApart from the clock enable versus "generated" clock point, your original code suffers from a rather trivial problem:
cnt:=cnt+1 is only conditionally executed. So it stops at cnt = 27000000.
