New Joiner

Well i guess first you need to design some thing .

I dont know about your knowledge in design but i think if you havnt designed anything in vhdl, verilog or system verilog then keep your device aside for some time and try out some basic designs like stop watch, arbiters etc.

If you are good with design skills then download i guess learn constraining your designs with sdc and some good knowledge about the tool through the .qpf file.

learn how to give constraints in sdc like clock generation,set input and output delays and the false paths. The information to all this is on altera's site and there are some links in the forum where these topics have been discussed just search with some keywords you will get many.

Best of luck :)