netlist conversion from Xilinx to altera compatible

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I am working on porting netlists from Xilinx ISE to Altera Quartus III. Can anyone help me in fixing this issue? Is there a converter or any software to convert Xilinx compatible netlist to Altera compatible one??

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What do you mean by a netlist?

What you should really have is the original source code in Verilog or VHDL format. You would then change the Xilinx IP for equivalent Altera IP and then resynthesize.

Cheers,

Dave

Hi,

i have the same question. I have a NGD netlist file, is it possible to port it to Altera device such as for example Cyclone III ?

best regards

madness

Hi,

sorry i have a *.NGC file, when googling:

The NGC file is a netlist that contains both logical design data and constraints This file replaces both EDIF(*1) and NCF(*2) files.

*1: EDIF = Electronic Data Interchange Format. An industry standard file format for specifying a design netlist.

*2: NCF = Netlist Constraints File. This constraints file is commonly used to define constraints for schematic editors and third-party tools

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That's too bad :P Thanks for your reply

best regards

How about importing it to other EDA synthesizer (let's assume that it's all just VHDL), and then export it to some kind of altera file ?

best regards