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Honored Contributor
Honored ContributorNeed help with Systemverilog
I got these errors. Please help. :) module test;
string s;
byte queue;
endmodule
Error (10911): SystemVerilog Unsupported Feature error at test.sv(7): Integrated Synthesis does...
Altera_ForumHonored Contributor
Honored ContributorRead the error message.
It says "synthesis", so that implies you're getting this error from Quartus. Try your code in Modelsim instead. Cheers, Dave
