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Altera_Forum
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14 years ago

NCO help...

Hi i'm trying to test a fixed point filter on a FPGA board, my filter has an input of 16 bit, but the maximum value it can take without saturation is 1023 which is 11 bits. so far the only signal i'v...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

No i'm not writing my code. the QMF from the link i posted is what i'm trying to implement on the FPGA. After completing the tutorial from the link i used a tool to called simulink to convert to fixed point and generate HDL. thats what i've be trying to do the whole time. the simulations from simulink looks fine but when i try on the FPGA everything goes bad.