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Altera_Forum
Honored Contributor
14 years agoNCO help...
Hi i'm trying to test a fixed point filter on a FPGA board, my filter has an input of 16 bit, but the maximum value it can take without saturation is 1023 which is 11 bits. so far the only signal i'v...
Altera_Forum
Honored Contributor
14 years agoOkay i see you're certainly right, i see that the Fsin_o does go from 1023 to -1024, but i see that the bus still going beyond 1023 (attached), could that possibly be the reason i'm not seeing my desired output? the last problem i can think of is that the subsystem is comprised of decimators and interpolators, because it's a multirate filter would i need to put rate transitions between each block for it work on the FPGA.