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Altera_Forum
Honored Contributor
14 years agoNCO help...
Hi i'm trying to test a fixed point filter on a FPGA board, my filter has an input of 16 bit, but the maximum value it can take without saturation is 1023 which is 11 bits. so far the only signal i'v...
Altera_Forum
Honored Contributor
14 years agoIt should be seen as a sign extension example, driving the unused MSB lines with the sign bit, it's under the sassumption, that the imput signal is signed in 2s complement.