My Clock Divider with enable doesn't work

Try this version: I didn't test it but it gives the idea

process(CLK,System_enable)
begin
if System_enable = '0' then
      CLKDiv <= "0000000000";    -- 10 bit counter 
      CLKDiv_d <= "0000000000";
elsif(rising_edge(CLK)) then        
  
        CLKDiv <= CLKDiv + 1;
        CLKDiv_d <= CLKDiv;
     
end if;
end process;
        
        
process (CLK)
begin
if (rising_edge(CLK)) then
    if ( CLKDiv(0) = '1') then   -- 1/2 clk
         ......  
         ......
    end if;
    if ( CLKDiv(1) = '1' and CLKDiv_d(1) = '0') then   -- 1/4 clk
         ......  
         ......
    end if;
   if ( CLKDiv(2) = '1' and CLKDiv_d(2) = '0') then   -- 1/8 clk
          ......  
          ......
     end if;
    ......
end if;
end process;