multiplier delay of embedded multiplier

Nios does it's own thing, and if the RTL has five levels of registers, then it will take that long. The actual embedded multiplier doesn't have 5 pipeline registers in it, so some of those will be for other logic(look at the Cyclone II handbook to see what is really built into the block). Synthesis must always match your code, the key is trying to write code that takes advantage of what's in the hardware. As long as you're inferring the blocks, you should be good.