to convert std_logic_Vector there is a function called
function to_sfixed (
arg : STD_ULOGIC_VECTOR; -- shifted vector
constant left_index : INTEGER;
constant right_index : INTEGER)
return UNRESOLVED_sfixed;
or there is this version:
function to_sfixed (
arg : STD_ULOGIC_VECTOR; -- shifted vector size_res : UNRESOLVED_sfixed) -- for size only return UNRESOLVED_sfixed;
where you can use another signal for sizing information
so for example, to convert a 14 bit slv to an sfixed with 6 integer bits and 8 fractional, use the function like this:
output <= to_sfixed(my_slv, 5, -8);
or you can do this:
output <= to_sfixed(my_slv, output);