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Altera_Forum
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15 years ago

Multiplexer Output Glitching

Hi all, I'm having trouble multiplexing a number of signals without the output glitching. The following 4 to 1 multiplexer with all the inputs connected to 1 shows the issue: module mult...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Of course I was wrong with the LUT, I should have thought a bit further ...

This effectively supports your theory that you should be able to make a 4 to 1 mux with just 3 LEs (or a 2^n to 1 mux with (n+1)*n/2 LEs)

The LUT will be glitch-free only it is purposely designed so. E.g. the TpHL is longer than the TpLH so that a 'one' disappearing overlaps the next 'one' appearing. The simulations tend to go along that line.