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Altera_Forum
Honored Contributor
15 years agoMultiplexer Output Glitching
Hi all, I'm having trouble multiplexing a number of signals without the output glitching. The following 4 to 1 multiplexer with all the inputs connected to 1 shows the issue: module mult...
Altera_Forum
Honored Contributor
15 years agoI don't see that equation glitching in my project. I compiled and simulated the project for different families and get different results in the gate level simulation (and that is not exactly the real world ...)
If you really need 'full' asynchronous behaviour, you will need to use 'full' asynchronous design procedures.