Honored Contributor
Honored ContributorHi Htain,
Re your reply, 1. no. The bus width of 2 controllers should less than the number of available DQ pins. First what I said is not to your attached design. We have a design of 2 ddr2 controllers on the same side of EP2S180F1508 (the largest package, I think). Each with 64 bit data bus. so total is 128 bits. In this case, you cannot directly use the constraints generated by the Megawizard for the 2 ddr2 controllers. >> So I've just checked, TWO 64bit DDR2 Interfaces do NOT fit on one side of a EP2S180F1508 device in DQS mode! DQS mode only applies to the top or bottom sides of a Stratix II device, and a Stratix II only has 9 x8 DQS groups. As each 64bit interface will require 8 x8 DQS groups, clearly two x64 interface in DQS mode cannot be done! Hence the only way to get two x64 DDR2 interfaces on one side of a 2S180F1508 is in NON-DQS mode - "Use non-migrateable DQ, DQS, and DM pins" The the design fits, and the constraints generated by the controller can be used! Note this means that the fastest operating frequency is 167MHz 2. The second one is also based on the design I mentioned above. (I am sorry if I did not make it clear). Quartus cannot let you pass if both controllers (each with 64 bit data bus) use DQS mode. The feedback clock mode will limited the highest frequency of controller. >> As stated, TWO 64bit DQS mode controllers simple do not fit on a single side, hence your statement makes no sense. The 2S180F1508 only has 9 x8 DQS groups (72bit MAX combined interface size), so you can ONLY have say a x32bit and a x48bit interface on the same side of a 2S180! In this case the IP works just fine and the correct constraints are generated. Also DQS mode interfaces on the same side of a Stratix II design MUST share the DLL, Hence: A) They MUST operate at the same frequency as each other. So IF: B) If the same memory devices are used. C) The same PCB layout constraints are applied. They WILL time the same as each other. In this instance the two or more controllers can actually share the same fedback PLL! Hope this helps you with your design. Regards Monkey:)
