Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Multiple LVDS inputs from Multiple sources- without DPA support

Hi i have a design working with Stratix II FPGA , it uses 44 LVDS inputs using DPA receiver for each , (eleven source , different distances, each sending 4 LVDS lines) now trying to find a ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hi

I'm using the same clock for all ( transmitters and receivers)

currently using stratix II 30 672 pin , now trying to move to stratix IV GX or Arria II Gx, with 700-1100 pins , chip as possible,

If I'll use the column LVDs then I will need a PLL for each of the sources (4 lines group) ,since each 4 lines are coming from different source ,

this will consume PLLs, and also doesn't give me any real time phase alignment ..

to what clock freq can I use the column LVDSs ?

thanks