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Altera_Forum
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12 years ago

Multiple High Speed ADCs via serial LVDS

Hi everybody, for a new system there is the need to digitize data with 12 Bit/80Msps from up to 20 channels. To date the idea would be using multiple Quad ADCs with serial LVDS links source ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

I guess that when you have two sets of DCO and FCO that the octal ADC is split up in two quadruple ADC with different timing. The picture you show implies that you use the FCO as the inclock. And so you need a PLL for every FCO or 2 per octal ADC in the case you refer to. It would have been nice if you had given a part-number so I can find a data-sheet.