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Altera_Forum's avatar
Altera_Forum
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12 years ago

Multiple High Speed ADCs via serial LVDS

Hi everybody, for a new system there is the need to digitize data with 12 Bit/80Msps from up to 20 channels. To date the idea would be using multiple Quad ADCs with serial LVDS links source ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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The ADC can output the data over 2 lanes, halving the speed requirements to only 480 MBit/s which can be handled, hands down, by a simple deserialiser, using the DCO as the main clock. In a project, a couple of years back now, I deserialised 4 octal ADCs running 50 MHz or 600 MBit/s on an EP2C8F256-C6N. No need for calibration.

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Hi josyb,

Did you process the FCO as normal data channel? Otherwise, i don't know how to align the data frame!