Forum Discussion
Altera_Forum
Honored Contributor
9 years agomulti-core NIOS boot
Hi guys, I'm going to design an FPGA system with two NIOS processors implemented an a Cyclone V device (not the SoC on, the one without ARM core). Each NIOS should be connected to a dedicate...
Altera_Forum
Honored Contributor
9 years agoHi Daixiwen,
thanks for your answer. The two NIOS shall run *different* softwares. From my understanding the boot process that you are suggesting is the following one [1] - FPGA configures itself by reading *.sof from EPCS. From now on both NIOS start working. [2] - NIOS_A keeps NIOS_B to reset state and executes boot-copier located in EPCS controller boot-rom [3] - Once NIOS_A boot has completed, NIOS_A application is launched and it releases NIOS_B from reset [4] - NIOS_B executes the bootloader located into on-chip memory boot-rom [5] - Once NIOS_B bootloader has finished the system is up and running =) I guess that keeping NIOS_B in reset state while at step [2] can be achieved by modifying the default boot-loader of NIOS_A. I've got a doubt about this point: soon after step [1] completes both NIOS start to execute rommed bootloaders that in turn both try to access EPCS device. At this point NIOS_A bootloader should be able to keep NIOS_B in reset and, in doing so, it grants exclusive access to EPCS device. This works fine if NIOS_A start a bit before NIOS_B. But, from my understanding, there is no guarantee that the latter condition is met. Theoretically both NIOS start soon after step [1] completes and both try to access EPCS device potentially compromising both NIOS boot process. Is this condition possibile? NIOS_B should be kept in reset in another way? Last question : someone know how is possible to place a custom bootloader to boot-rom? Thanks again