mSGDMA stride reads/writes

So you DMA data from the FFT into memory, then have another DMA transfer to push the recently copied memory locations into the MAC correct? If so have you debugged the first transfer to ensure that it's completing correctly because at least that will narrow down the culprit.

The setup looked ok to me except it doesn't look like you are using interrupts when you construct the descriptor. So there are two layers of interrupt setup that needs to happen, the global interrupts need to be enabled in the control register of the CSR port, but in order for interrupts to fire you have to enable them when constructing the descriptor as well. There are a few interrupt bits in the control field of the descriptor but the one you want is the transfer done interrupt.

Some additional info: The early termination interrupt flag is for ST-->MM packet transfers, and it fires (if enabled) when the DMA ends up moving more streaming data than what you specify as the transfer length. In other words the DMA lets you put a cap on the amount of data moved in a ST-->MM transfer in the event that the EOP bit never arrives. There is also an error interrupt as well to let you know if any of the ST-->MM data has any of the error bits asserted.