Altera_Forum
Honored Contributor
Honored Contributormore components in paths
hiii alll i am facing too many components in my critical path.. I know it depends on coding..but is there anything i can do in synthesis to reduce this total delay
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Altera_ForumHonored Contributor
Honored ContributorOften timing problems are down to the HDL. With >200Mhz you have to be careful how many gates between registers, usually trying to use no more than 1 or 2 LUTs. Have you got any parts in your statemachine with complicated "if" statements. You can usually break these down and pipeline them.
