Forum Discussion
Altera_Forum
Honored Contributor
14 years agoModelSim vsim-3039 fatal error
Hi all, I would like to simulate a very simple design in SystemVerilog and to compare the results of RTL and gate level simulation. The RTL simulation works OK but if I launch the gate level s...
Altera_Forum
Honored Contributor
14 years agoThe error message tells you the problem: Instantiation of 'CombRepeater' failed.
Have you compiled the source for 'CombRepeater'? Cheers, Dave