ModelSim error

Hello everybody,

when I'm compiling my testbench I get the following error:

(vcom-1031) Formal generic "width" has OPEN or no actual associated with it.

I have a project running on ModelSim. I implemented a file reg.vhd that used a generic register size (width). The problem comes with a testbench related to another .vhd file where I did not use any generic thing. When I doubleclick on the error it shows me that it should be in the following part of code:

Mapping: entity one_shot(behav)
port map (clock => clock_tb,
          reset => reset_tb,
          pulse_o => pulse_o_tb,
          trigger_i => trigger_tb
          );

Thanks for help, I hope the info is enough.

MelonWars