Altera_Forum
Honored Contributor
14 years agoModelsim: compiling into libraries
Hi all,
I've a few questions regarding Modelsim: 1) libraries contain the VHDL files or the result of the compilation of these files? 2) How can I compile a file in a directory by my choice, different from the work directory? 3) In a testbench, i saw this: library work; use work.lib_one.all; use work.lib_two.all; This means that in work directory there are subdirectories named lib_one, lib_two, and in those subdirectories there were compiled some VHDL files. How can I create subdirectories of WORK and compile there VHDL files? Thanks a lot for your answers.