Migrating devices - Power and Ground on I/Os?

By the way , I have a question about "Unused Pins Driving Ground / VCC"

When we design DDRII interface

using IO Standard of SSTL18 Class I

In order to reduce SSN ,

I have tried to put all the unused pins to be user-assigned Outputs driving Ground

(In experimental result , Ground Bounce seems more significant then VCC sag)

And then on the PCB , these unused pins are connected to Ground

However , Fitter gives a error message that

It violates the VREF rules (I guess Quartus treats the pins as output although they are driving ground directly)

And then finally , I choose not to place Pins in design file for these unused pins

In Assignment --> Device --> Device and Pin Options --> Unused Pins

--> As output driving Gorund

Comparing these two approach , do they give the same result ?

I mean , do they help in reducing SSN in same extent ?

Thanks