MAX7000 power and Slew rate control

There is a general problem with the code, not obvious at first sight. It's from the fact, that I and Q are asynchronous inputs, unrelated to clk. They have to be synchronized to clk. A general rule recommends to use a two FF chain to handle possible metastable states, although a single FF as below usually solves the problem. The assignment of previous values can be performed in the unconditional code as well.

module IQ_interface(clk, I, Q, count);
output count;
input clk, I, Q;
reg Is, Qs;
reg last_I, last_Q;
reg count;
always @(posedge clk)
begin 
Is <= I;
Qs <= Q;
last_I <= Is;
last_Q <= Qs;
if (last_I != Is)
  if (Is ^Qs) count <= count + 1;
  else count <= count - 1;
if (last_Q != Qs)
  if (Is ^Qs) count <= count - 1;
  else count <= count + 1;
end;