Forum Discussion
Hi Gigi,
I don't see signals "ENC4_A" and "ENC4_B" connected to the ground in your new design file. Can you explain what those signals, along with the alarm signal do?
Can you use the SignalTap logic analyzer on the 4Encoder to probe and debug the behaviour of internal signals during normal device operation? SignalTap can be used to monitor your real time signal, so you can find the root cause of the problem.
Here's a document that can help you understand SignalTap: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/qts/qts_qii53009.pdf?wapkw=signal%20tap%20
There are also some training courses about SignalTap available on Intel FPGA's YouTube channel: https://www.youtube.com/watch?v=RtPqQ25hSIk
Regards,
Nurina
- Gigiz4 years ago
New Contributor
Hi Nurina,
thanks for the informations, ENC4_A and ENC_B are in the input of "EtherCAT" block at topo level design.
The "ENC4_ALARM" is not a problem.
Best Regards,
Gigi
- Gigiz4 years ago
New Contributor
Hi Nurina,
How can I fix the 332060 and 332068 warnings ?
Thanks.
Best Regards,
Gigi